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Disambiguation of "Kim, Nam Sung"

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Improving Throughput of Power-Constrained GPUs Using Dynamic Voltage/Frequency and Core Scaling.

, , , , and . PACT, page 111-120. IEEE Computer Society, (2011)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Nam Tran University of Stuttgart

Kim Meliani University of Stuttgart

Joel Kimmich University of Stuttgart

Deniz Namli University of Stuttgart

Do Yeon Kim University of Stuttgart

 

Other publications of authors with the same name

Resilient High-Performance Processors with Spare RIBs., , and . IEEE Micro, 33 (4): 26-34 (2013)Decoupled Control and Data Processing for Approximate Near-Threshold Voltage Computing., , and . IEEE Micro, 35 (4): 70-78 (2015)REEL: Reducing effective execution latency of floating point operations., , , , , and . ISLPED, page 187-192. IEEE, (2013)Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads., , , , , , , , and . ISVLSI, page 68-75. IEEE, (2019)Workload and power budget partitioning for single-chip heterogeneous processors., , , , and . PACT, page 401-410. ACM, (2012)Application-Transparent Near-Memory Processing Architecture with Memory Channel Network., , , , , , , , , and 3 other author(s). MICRO, page 802-814. IEEE Computer Society, (2018)Energy-Efficient and Metastability-Immune Timing-Error Detection and Instruction-Replay-Based Recovery Circuits for Dynamic-Variation Tolerance., , , , , , , and . ISSCC, page 402-403. IEEE, (2008)Bolt: Faster Reconfiguration in Operating Systems., , and . USENIX Annual Technical Conference, page 511-516. USENIX Association, (2015)Row-buffer decoupling: A case for low-latency DRAM microarchitecture., , , and . ISCA, page 337-348. IEEE Computer Society, (2014)Scratchpad memory optimizations for digital signal processing applications., , and . DATE, page 974-979. IEEE, (2011)