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Disambiguation of "Schaumont, Patrick"

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State-of-the-art of Secure ECC Implementations: A Survey on Known Side-channel Attacks and Countermeasures.

, , , , , and . HOST, page 76-87. IEEE Computer Society, (2010)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Univ. -Prof. Dr. rer. nat. Patrick Bräutigam University of Stuttgart

Improved removal of micropollutants and pathogens from municipal wastewater using a pilot-scale hybrid system combining powdered activated carbon and ultrafiltration, , , , , , and . Journal of Environmental Chemical Engineering, 13 (5): 118642 (October 2025)

Patrick Hippold University of Stuttgart

Patrick Frey University of Stuttgart

Patrick Maisenhölder University of Stuttgart

Patrick Lerge University of Stuttgart

 

Other publications of authors with the same name

The Impact of Aging on a Physical Unclonable Function., and . IEEE Trans. VLSI Syst., 22 (9): 1854-1864 (2014)A Technique for Combined Virtual Prototyping and Hardware Design., , , , , and . International Workshop on Rapid System Prototyping, page 156-161. IEEE Computer Society, (1998)A Hardware Virtual Machine for the Networked Reconfiguration., , , , , , and . IEEE International Workshop on Rapid System Prototyping, page 194-199. IEEE Computer Society, (2000)A Simulator for Flexible Sensor Nodes in Wireless Networks., , , and . MSN, page 373-375. IEEE Computer Society, (2011)A software-hardware emulator for sensor networks., , , , , and . SECON, page 440-448. IEEE, (2011)Simulating power/energy consumption of sensor nodes with flexible hardware in wireless networks., , , and . SECON, page 112-120. IEEE, (2012)Efficient and side-channel-secure block cipher implementation with custom instructions on FPGA., , and . FPL, page 20-25. IEEE, (2012)Synthesis of pipelined DSP accelerators with dynamic scheduling., , , and . IEEE Trans. VLSI Syst., 5 (1): 59-68 (1997)A flexible design flow for software IP binding in commodity FPGA., , and . SIES, page 211-218. IEEE, (2009)Low Power Digital Frequency Conversion Architectures., , , and . VLSI Signal Processing, 18 (2): 187-197 (1998)