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Disambiguation of "Kahng, Andrew B."

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Enhancing the Efficiency of Energy-Constrained DVFS Designs.

, , , and . IEEE Trans. VLSI Syst., 21 (10): 1769-1782 (2013)

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B. Schlecht

Andrew Furze University of Stuttgart

Dr. Andrew Clark University of Stuttgart

Max B. Schäfer

Andrew Nelson Butterfield University of Stuttgart

 

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Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors., , , and . IEEE Trans. VLSI Syst., 22 (10): 2117-2130 (2014)2003 Technology Roadmap for Semiconductors., , , and . IEEE Computer, 37 (1): 47-56 (2004)2001 Technology Roadmap for Semiconductors., , , , , and . IEEE Computer, 35 (1): 42-53 (2002)Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (7): 1070-1082 (2010)Fast Dual-Graph-Based Hotspot Filtering., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (9): 1635-1642 (2008)Recovery-Driven Design: Exploiting Error Resilience in Design of Energy-Efficient Processors., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (3): 404-417 (2012)Timing Yield-Aware Color Reassignment and Detailed Placement Perturbation for Bimodal CD Distribution in Double Patterning Lithography., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 29 (8): 1229-1242 (2010)CMP Fill Synthesis: A Survey of Recent Studies., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (1): 3-19 (2008)Statistical Timing Analysis in the Presence of Signal-Integrity Effects., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (10): 1873-1877 (2007)Toward Holistic Modeling, Margining and Tolerance of IC Variability.. ISVLSI, page 284-289. IEEE Computer Society, (2014)