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Disambiguation of "Flandre, Denis"

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Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs.

, , , , and . SBCCI, page 26-. IEEE Computer Society, (2003)

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Pavel Denisov University of Stuttgart

Denis Sedov University of Stuttgart

Denis Dertli University of Stuttgart

Denis Ouedraogo University of Stuttgart

Denis Schwachhofer University of Stuttgart

 

Other publications of authors with the same name

ULPFA: A New Efficient Design of a Power-Aware Full Adder., , , and . IEEE Trans. on Circuits and Systems, 57-I (8): 2066-2074 (2010)Design of an Ultra-Low-Power Multi-Stage AC/DC Voltage Rectifier and Multiplier Using a Fully-Automated and Portable Design Methodology., , and . J. Low Power Electronics, 8 (2): 197-206 (2012)Impact of Technology Scaling on Digital Subthreshold Circuits., , , and . ISVLSI, page 179-184. IEEE Computer Society, (2008)Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation., , , , and . Microelectronics Journal, 39 (12): 1663-1670 (2008)Dynamic differential self-timed logic families for robust and low-power security ICs., , , and . Integration, 40 (3): 355-364 (2007)Understanding the limitations and improving the relevance of SPICE simulations in side-channel security evaluations., , , and . J. Cryptographic Engineering, 4 (3): 187-195 (2014)Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell., , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 189-197. Springer, (2004)A 16×16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell., , and . IEEE Trans. Biomed. Circuits and Systems, 10 (2): 364-374 (2016)Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits., , , and . ISCAS, page 1484-1487. IEEE, (2010)Low Leakage SOI CMOS Static Memory Cell With Ultra-Low Power Diode., , and . J. Solid-State Circuits, 42 (3): 689-702 (2007)