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ULPFA: A New Efficient Design of a Power-Aware Full Adder.

, , , and . IEEE Trans. on Circuits and Systems, 57-I (8): 2066-2074 (2010)

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Low-swing current mode logic (LSCML): A new logic style for secure and robust smart cards against power analysis attacks., , , and . Microelectronics Journal, 37 (9): 997-1006 (2006)Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder., , , , and . Multiple-Valued Logic and Soft Computing, 13 (1-2): 61-78 (2007)Ultra-fine grain reconfigurability using CNTFETs., , , , , and . ICECS, page 194-197. IEEE, (2007)Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs., , and . VLSI-SoC (Selected Papers), volume 313 of IFIP Advances in Information and Communication Technology, page 97-113. Springer, (2008)ULPFA: A New Efficient Design of a Power-Aware Full Adder., , , and . IEEE Trans. on Circuits and Systems, 57-I (8): 2066-2074 (2010)Dynamic differential self-timed logic families for robust and low-power security ICs., , , and . Integration, 40 (3): 355-364 (2007)A non-volatile run-time FPGA using thermally assisted switching MRAMS., , , , and . FPL, page 421-426. IEEE, (2008)Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell., , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 189-197. Springer, (2004)