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Disambiguation of "Ghosh, Swaroop"

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A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology.

, , , , , , , , , , , and . J. Solid-State Circuits, 50 (1): 150-157 (2015)

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Univ. -Prof. Dr. Robin Ghosh University of Stuttgart

Tufan Ghosh University of Stuttgart

Gautam Ghosh University of Stuttgart

 

Other publications of authors with the same name

Impact of process-variations in STTRAM and adaptive boosting for robustness., , and . DATE, page 1431-1436. ACM, (2015)A family of Schmitt-Trigger-based arbiter-PUFs and selective challenge-pruning for robustness and quality., and . HOST, page 32-37. IEEE Computer Society, (2015)A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning., , and . IOLTS, page 287-292. IEEE Computer Society, (2005)Coping with Variations through System-Level Design., , , , , and . VLSI Design, page 581-586. IEEE Computer Society, (2009)Modeling of Retention Time for High-Speed Embedded Dynamic Random Access Memories.. IEEE Trans. on Circuits and Systems, 61-I (9): 2596-2604 (2014)Energy centric model of SRAM write operation for improved energy and error rates.. CICC, page 1-4. IEEE, (2013)iMACE: In-Memory Acceleration of Classic McEliece Encoder., , , , and . ISVLSI, page 513-518. IEEE, (2019)FIXER: Flow Integrity Extensions for Embedded RISC-V., , , and . DATE, page 348-353. IEEE, (2019)A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support., , , , , , , , , and 3 other author(s). ISLPED, page 34:1-34:6. ACM, (2018)Attack resilient architecture to replace embedded Flash with STTRAM in homogeneous IoTs., , and . CoRR, (2016)