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Disambiguation of "Viswanath, Vinod"

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Dedicated Rewriting: Automatic Verification of Low Power Transformations in Register Transfer Level.

, , and . J. Low Power Electronics, 5 (3): 339-353 (2009)

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Tarun Kumar Mitruka Vinod Kumar Mitruka University of Stuttgart

The mixed displacement method to avoid shear locking in problems in elasticity, and . Special Issue: 94th Annual Meeting of the International Association of Applied Mathematics and Mechanics (GAMM), 24, 4, page e202400129. Wiley, (2024)
 

Other publications of authors with the same name

Efficient Microprocessor Verification using Antecedent Conditioned Slicing., , and . VLSI Design, page 43-49. IEEE Computer Society, (2007)Dedicated Rewriting: Automatic Verification of Low Power Transformations in Register Transfer Level., , and . J. Low Power Electronics, 5 (3): 339-353 (2009)Automatic insertion of low power annotations in RTL for pipelined microprocessors., , and . DATE, page 496-501. European Design and Automation Association, Leuven, Belgium, (2006)Automatic and Correct Register Transfer Level Annotations for Low Power Microprocessor Design., and . J. Low Power Electronics, 8 (4): 424-439 (2012)Automatic decomposition for sequential equivalence checking of system level and RTL descriptions., , , and . MEMOCODE, page 71-80. IEEE Computer Society, (2006)Sequential equivalence checking between system level and RTL descriptions., , , and . Design Autom. for Emb. Sys., 12 (4): 377-396 (2008)Power Management Methods: From Specification and Modeling, to Techniques and Verification., , , and . J. Low Power Electronics, 8 (4): 353-377 (2012)Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL., , and . VLSI Design, page 77-82. IEEE Computer Society, (2009)The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture., , and . ARVLSI, page 256-275. IEEE Computer Society, (1999)Welcome., , , , , , , and . ISQED, IEEE, (2016)