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Disambiguation of "Anghel, Lorena"

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Error resilience of intra-die and inter-die communication with 3D spidergon STNoC.

, , , , and . DATE, page 275-278. IEEE, (2010)

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Lorena Hägele University of Stuttgart

 

Other publications of authors with the same name

Study of workload impact on BTI HCI induced aging of digital circuits., , , , and . DATE, page 1020-1021. IEEE, (2016)New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs., , and . DFT, page 99-107. IEEE Computer Society, (2002)Coupling Different Methodologies to Validate Obsolete Microprocessors., , , , and . DFT, page 250-255. IEEE Computer Society, (2004)Fault-tolerant adaptive routing under an unconstrained set of node and link failures for many-core systems-on-chip., , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 38 (6): 620-635 (2014)Adaptive inter-layer message routing in 3D networks-on-chip., , and . Microprocessors and Microsystems - Embedded Hardware Design, 35 (7): 613-631 (2011)Improving the scalability of checkpoint recovery for networks-on-chip., , and . ISCAS, page 2793-2796. IEEE, (2008)Configurable serial fault-tolerant link for communication in 3D integrated systems., , , and . IOLTS, page 115-120. IEEE Computer Society, (2010)Multi-context non-volatile content addressable memory using magnetic tunnel junctions., , , and . NANOARCH, page 103-108. ACM, (2016)CNTFET Modeling and Reconfigurable Logic-Circuit Design., , , , , , , , , and 2 other author(s). IEEE Trans. on Circuits and Systems, 54-I (11): 2365-2379 (2007)Hidden-Delay-Fault Sensor for Test, Reliability and Security., , , and . DATE, page 316-319. IEEE, (2019)