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Disambiguation of "Peddersen, Jorgen"

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SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy.

, , , and . DAC, page 356-361. ACM, (2010)

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Other publications of authors with the same name

CIPARSim: Cache intersection property assisted rapid single-pass FIFO cache simulation technique., , and . ICCAD, page 126-133. IEEE Computer Society, (2011)MASHfifo: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache Analysis., , and . DAC, page 200:1-200:6. ACM, (2014)Improved Architectures for Range Encoding in Packet Classification System., , and . NCA, page 10-19. IEEE Computer Society, (2010)Realizing Cycle Accurate Processor Memory Simulation via Interface Abstraction., , and . VLSI Design, page 141-146. IEEE Computer Society, (2011)Dueling CLOCK: Adaptive cache replacement policy based on the CLOCK algorithm., , , and . DATE, page 920-925. IEEE, (2010)Low-Impact Processor for Dynamic Runtime Power Management., and . IEEE Design & Test of Computers, 25 (1): 52-62 (2008)DRMA: dynamically reconfigurable MPSoC architecture., , , , , , and . ACM Great Lakes Symposium on VLSI, page 239-244. ACM, (2013)E-pipeline: elastic hardware/software pipelines on a many-core fabric., , , , , and . DATE, page 363-368. ACM, (2015)Energy Driven Application SelfAdaptation., and . VLSI Design, page 385-390. IEEE Computer Society, (2007)CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time., and . ASP-DAC, page 890-895. IEEE Computer Society, (2007)