PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Teich, Jürgen"

Author of the publication

copydeleteadd this publication to your clipboard
Symbolic voter placement for dependability-aware system synthesis.

, , , , , and . CODES+ISSS, page 237-242. ACM, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays., , and . J. Low Power Electronics, 7 (1): 29-40 (2011)Parametric yield optimization using leakage-yield-driven floorplanning., , and . PATMOS, page 1-6. IEEE, (2014)A feasibility-preserving local search operator for constrained discrete optimization problems., , , and . IEEE Congress on Evolutionary Computation, page 1968-1975. IEEE, (2008)Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models., , and . FDL, page 1-6. IEEE, (2008)A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template., , , and . ReCoSoC, page 31-37. Univ. Montpellier II, (2006)Digitale Hardware/Software-Systeme - Synthese und Optimierung.. Springer, (1997)Reconfigurable Computing Systems (Rekonfigurierbare Rechensysteme).. it - Information Technology, 49 (3): 139- (2007)Invasive Algorithms and Architectures (Invasive Algorithmen und Architekturen).. it - Information Technology, 50 (5): 300-310 (2008)Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators., , and . FCCM, page 279-282. IEEE Computer Society, (2009)A rule-based static dataflow clustering algorithm for efficient embedded software synthesis., , , and . DATE, page 521-526. IEEE, (2011)