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SAT-decoding in evolutionary algorithms for discrete constrained optimization problems., , , and . IEEE Congress on Evolutionary Computation, page 935-942. IEEE, (2007)A symbolic system synthesis approach for hard real-time systems based on coordinated SMT-solving., , , , and . DATE, page 357-362. ACM, (2015)Efficient High-Level modeling in the networking domain., , , , and . DATE, page 1189-1194. IEEE, (2010)Incorporating graceful degradation into embedded system design., , , and . DATE, page 320-323. IEEE, (2009)SAT-Based Techniques in System Synthesis., , , and . DATE, page 11168-11169. IEEE Computer Society, (2003)Modellierung rekonfigurierbarer Systemarchitekturen., , , and . MBMV, page 163-171. Shaker, (2002)Semi-Automatic Generation of mixed Hardware/Software Prototypes from Simulink Models., , , , and . MBMV, page 139-148. Shaker, (2008)Using Symbolic Feasibility Tests during Design Space Exploration of Heterogeneous Multi-Processor Systems., , , and . ASAP, page 9-14. IEEE Computer Society, (2005)Calibration and validation of software performance models for pedestrian detection systems., , , , and . ICSAMOS, page 182-189. IEEE, (2011)Integrated Modeling using Finite State Machines and Dataflow Graphs., , , , and . Handbook of Signal Processing Systems, Springer, (2010)