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Disambiguation of "Homma, Naofumi"

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A Graph-Based Approach to Designing Parallel Multipliers over Galois Fields Based on Normal Basis Representations.

, , and . ISMVL, page 158-163. IEEE Computer Society, (2013)

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Other publications of authors with the same name

A DPA/DEMA/LEMA-resistant AES cryptographic processor with supply-current equalizer and micro EM probe sensor., , , , , and . ASP-DAC, page 26-27. IEEE, (2015)Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (1): 1-4 (2016)Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation., , , and . PPSN, volume 3242 of Lecture Notes in Computer Science, page 342-351. Springer, (2004)A Ternary Fuzzy Extractor for Efficient Cryptographic Key Generation., , and . ISMVL, page 49-54. IEEE, (2019)High-Performance Concurrent Error Detection Scheme for AES Hardware., , , and . CHES, volume 5154 of Lecture Notes in Computer Science, page 100-112. Springer, (2008)High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching., , , , and . CHES, volume 4249 of Lecture Notes in Computer Science, page 187-200. Springer, (2006)A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation., , , and . CHES, volume 9813 of Lecture Notes in Computer Science, page 538-558. Springer, (2016)A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments., , , , and . IEICE Transactions, 95-A (1): 263-266 (2012)Design of Multiple-valued Arithmetic Circuits Using Counter Tree Diagrams., , , and . Multiple-Valued Logic and Soft Computing, 13 (4-6): 487-502 (2007)Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current., , , , , , , , , and . IEICE Transactions, 95-C (6): 1089-1097 (2012)