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Disambiguation of "Sugawara, Takeshi"

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A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments.

, , , , and . IEICE Transactions, 95-A (1): 263-266 (2012)

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Other publications of authors with the same name

Profiling attack using multivariate regression analysis., , , and . IEICE Electronic Express, 7 (15): 1139-1144 (2010)High-Performance Architecture for Concurrent Error Detection for AES Processors., , , and . IEICE Transactions, 94-A (10): 1971-1980 (2011)Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates., , , , , , , , , and 4 other author(s). IEEE Trans. VLSI Syst., 20 (5): 827-840 (2012)Q-Class Authentication System for Double Arbiter PUF., , , and . IEICE Transactions, 101-A (1): 129-137 (2018)Sensor CON-Fusion: Defeating Kalman Filter in Signal Injection Attack., , , and . AsiaCCS, page 511-524. ACM, (2018)Recovering Memory Access Sequence with Differential Flush+Reload Attack., , , , and . ISPEC, volume 11125 of Lecture Notes in Computer Science, page 424-439. Springer, (2018)A Secure LiDAR with AES-Based Side-Channel Fingerprinting., , and . CANDAR Workshops, page 479-482. IEEE Computer Society, (2018)On Measurable Side-Channel Leaks Inside ASIC Design Primitives., , , , and . CHES, volume 8086 of Lecture Notes in Computer Science, page 159-178. Springer, (2013)A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments., , , , and . IEICE Transactions, 95-A (1): 263-266 (2012)Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current., , , , , , , , , and . IEICE Transactions, 95-C (6): 1089-1097 (2012)