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Disambiguation of "Reddy, Sudhakar M."

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Functional test of small-delay faults using SAT and Craig interpolation.

, , , , , and . ITC, page 1-8. IEEE Computer Society, (2012)

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M. Nudischer

M. Kratzer

M. Liewald

M. Fittingho

M. Christmann

 

Other publications of authors with the same name

Hazard-Based Detection Conditions for Improved Transition Fault Coverage of Functional Test Sequences., and . DFT, page 358-366. IEEE Computer Society, (2009)On-chip Generation of the Second Primary Input Vectors of Broadside Tests., and . DFT, page 38-46. IEEE Computer Society, (2009)Diagnosis of Multiple Faults Based on Fault-Tuple Equivalence Tree., , , , and . DFT, page 217-225. IEEE Computer Society, (2011)Test Generation for Open Defects in CMOS Circuits., , , , and . DFT, page 41-49. IEEE Computer Society, (2006)MIX: A Test Generation System for Synchronous Sequential Circuits., , and . VLSI Design, page 456-463. IEEE Computer Society, (1998)Improved Algorithms for Constructive Multi-Phase Test Point Insertion for Scan Based BIST., , and . VLSI Design, page 604-. IEEE Computer Society, (2002)MUSTC-Testing: Multi-Stage-Combinational Test scheduling at the Register-Transfer Level., , and . VLSI Design, page 110-115. IEEE Computer Society, (1995)Efficient SAT-Based Circuit Initialization for Larger Designs., , , and . VLSI Design, page 62-67. IEEE Computer Society, (2014)On Full Reset as a Design-For-Testability Technique., and . VLSI Design, page 534-536. IEEE Computer Society, (1997)Improved built-in test pattern generators based on comparison units for synchronous sequential circuits., and . ICCD, page 26-31. (1998)