PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Joshi, Vivek"

Author of the publication

copydeleteadd this publication to your clipboard
MRI-based active shape model of the human proximal femur using fiducial and secondary landmarks and its validation.

, , , , , , , and . Medical Imaging: Biomedical Applications in Molecular, Structural, and Functional Imaging, volume 10578 of SPIE Proceedings, page 105781L. SPIE, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jasmin Joshi-Thompson University of Stuttgart

Nithyasree Vivekanandham Pushpalatha University of Stuttgart

 

Other publications of authors with the same name

SRAM read current variability and its dependence on transistor statistics., , , , , , and . CICC, page 1-4. IEEE, (2013)Novel Back Gate Doping Ultra Low Retention Power 22nm FDSOl SRAM for IOT Application., , , , , , , , , and 13 other author(s). ESSDERC, page 78-81. IEEE, (2018)Analyzing electrical effects of RTA-driven local anneal temperature variation., , , and . ASP-DAC, page 739-744. IEEE, (2010)MRI-based active shape model of the human proximal femur using fiducial and secondary landmarks and its validation., , , , , , , and . Medical Imaging: Biomedical Applications in Molecular, Structural, and Functional Imaging, volume 10578 of SPIE Proceedings, page 105781L. SPIE, (2018)IUF Scheduling Algorithm for Improving the Schedulability, Predictability and Sustainability of the Real Time System., , and . ICETET, page 998-1003. IEEE Computer Society, (2009)Design-patterning co-optimization of SRAM robustness for double patterning lithography., , and . ASP-DAC, page 713-718. IEEE, (2012)Logic SER Reduction through Flipflop Redesign., , , and . ISQED, page 611-616. IEEE Computer Society, (2006)Leakage power reduction using stress-enhanced layouts., , , , and . DAC, page 912-917. ACM, (2008)Simultaneous extraction of effective gate length and low-field mobility in non-uniform devices., , and . ISQED, page 158-162. IEEE, (2010)Stress aware layout optimization., , , , and . ISPD, page 168-174. ACM, (2008)