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1: 16 DEMUX.

N. Nedovic, N. Tzartzanis, H. Tamura, F. Rotella, M. Wiklund, Y. Mizutani, Y. Okaniwa, T. Kuroda, J. Ogawa, and W. Walker. J. Solid-State Circuits, 42 (12): 2726-2735 (2007)

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Moritz Walker University of Stuttgart

Domänenspezifische Sprache: Automatisierte Echtzeit-Orchestrierung Container-basierter SteuerungsanwendungenM. Walker, M. Fischer, and M. Neubauer. SPS-Magazin, (2024)

Dr. -Ing. Matthias Walker University of Stuttgart

Oliver Walker University of Stuttgart

Tim W{\"{u}}rtele

Other publications of authors with the same name

A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS.S. Parikh, T. Kao, Y. Hidaka, J. Jiang, A. Toda, S. McLeod, W. Walker, Y. Koyanagi, T. Shibuya, and J. Yamada. ISSCC, page 28-29. IEEE, (2013)A 40-to-44Gb/s 3�? Oversampling CMOS CDR/1: 16 DEMUX.N. Nedovic, N. Tzartzanis, H. Tamura, F. Rotella, M. Wiklund, Y. Mizutani, Y. Okaniwa, T. Kuroda, J. Ogawa, and W. Walker. ISSCC, page 224-598. IEEE, (2007)A Transparent Voltage Conversion Method and Its Application to a Dual-Supply-Voltage Register File.N. Tzartzanis, and W. Walker. ICCD, page 107-. IEEE Computer Society, (2003)An efficient transistor optimizer for custom circuits.X. Yu, V. Oklobdzija, and W. Walker. ISCAS (5), page 197-200. IEEE, (2003)A Leakage Current Replica Keeper for Dynamic Circuits.Y. Lih, N. Tzartzanis, and W. Walker. J. Solid-State Circuits, 42 (1): 48-55 (2007)Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISI.M. van Ierssel, H. Yamaguchi, A. Sheikholeslami, H. Tamura, and W. Walker. IEEE Trans. on Circuits and Systems, 55-I (5): 1306-1315 (2008)Analysis techniques for obtaining the steady-state solution of MOS LC oscillators.M. Mansour, A. Mehrotra, W. Walker, and A. Narayan. ISCAS (5), page 512-515. IEEE, (2004)A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS.K. Kanda, H. Tamura, T. Yamamoto, S. Matsubara, M. Kibune, Y. Doi, T. Shibasaki, N. Tzartzanis, A. Kristensson, S. Parikh and 8 other author(s). J. Solid-State Circuits, 44 (12): 3580-3589 (2009)A Case Study: Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing.H. Ando, N. Tzartzanis, and W. Walker. IEEE Trans. VLSI Syst., 13 (7): 865-868 (2005)A 5Gb/s Transmitter with Reflection Cancellation for Backplane Transceivers.R. Yuen, M. van Ierssel, A. Sheikholeslami, W. Walker, and H. Tamura. CICC, page 413-416. IEEE, (2006)

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Disambiguation of "Walker, William W."

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A 40-44 Gb/s 3 × Oversampling CMOS CDR/1: 16 DEMUX.

Please choose a person to relate this publication to

Moritz Walker University of Stuttgart

Dr. -Ing. Matthias Walker University of Stuttgart

Oliver Walker University of Stuttgart

Tim W{\"{u}}rtele

Tim W{\"{u}}rtele

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Walker, William W."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 40-44 Gb/s 3 × Oversampling CMOS CDR/1: 16 DEMUX.

Please choose a person to relate this publication to

Moritz Walker University of Stuttgart

Dr. -Ing. Matthias Walker University of Stuttgart

Oliver Walker University of Stuttgart

Tim W{\"{u}}rtele

Tim W{\"{u}}rtele

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 40-44 Gb/s 3 × Oversampling CMOS CDR/1: 16 DEMUX.