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Performance and power evaluation of an in-line accelerator.

, , , , , and . Conf. Computing Frontiers, page 81-82. ACM, (2010)

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Characterization of transient error tolerance for a class of mobile embedded applications., , , , and . IISWC, page 74-75. IEEE Computer Society, (2014)Energy-Aware Accounting and Billing in Large-Scale Computing Facilities., , , , , , , and . IEEE Micro, 31 (3): 60-71 (2011)Parallel logic/fault simulation of VLSI array logic.. ICCAD, page 190-193. IEEE Computer Society, (1988)ChopStiX: Systematic Extraction of Code-Representative Microbenchmarks., , , , , and . IISWC, page 80-81. IEEE Computer Society, (2018)A case for guarded power gating for multi-core processors., , , and . HPCA, page 291-300. IEEE Computer Society, (2011)Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors., , , , , , , , , and 1 other author(s). HPCA, page 238-242. IEEE Computer Society, (2005)Metrics for Architecture-Level Lifetime Reliability Analysis., , , and . ISPASS, page 202-212. IEEE Computer Society, (2008)Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks., , , , and . MICRO, page 199-211. IEEE Computer Society, (2012)Robust power management in the IBM z13., , , , , , , , , and 5 other author(s). IBM Journal of Research and Development, (2015)Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems., , , , and . IBM Journal of Research and Development, 57 (1/2): 4 (2013)