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Metrics for Architecture-Level Lifetime Reliability Analysis.

, , , and . ISPASS, page 202-212. IEEE Computer Society, (2008)

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Evaluating the performance of active cache management schemes., , , , and . ICCD, page 368-375. (1998)Exploiting Structural Duplication for Lifetime Reliability Enhancement., , , and . ISCA, page 520-531. IEEE Computer Society, (2005)On Effective Data Supply For Multi-Issue Processors., , and . ICCD, page 519-528. IEEE Computer Society, (1997)A Framework for Architecture-Level Lifetime Reliability Modeling., , , , and . DSN, page 534-543. IEEE Computer Society, (2007)Online Estimation of Architectural Vulnerability Factor for Soft Errors., , , and . ISCA, page 341-352. IEEE Computer Society, (2008)Power management of multi-core chips: Challenges and pitfalls., , , , , , , , , and 1 other author(s). DATE, page 977-982. IEEE, (2012)Active Management of Data Caches by Exploiting Reuse Information., , , , and . IEEE Trans. Computers, 48 (11): 1244-1259 (1999)Error Tolerance in Server Class Processors., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (7): 945-959 (2011)The Case for Lifetime Reliability-Aware Microprocessors., , , and . ISCA, page 276-287. IEEE Computer Society, (2004)Performance Issues in Integrating Temporality-Based Caching with Prefetching., and . Perform. Eval., 27/28 (4): 189-207 (1996)