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A Fully Integrated Digital LDO With Built-In Adaptive Sampling and Active Voltage Positioning Using a Beat-Frequency Quantizer.

, , , , and . J. Solid-State Circuits, 54 (1): 109-120 (2019)

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Minimizing Soft Errors in TCAM Devices: A Probabilistic Approach to Determining Scrubbing Intervals., , and . IEEE Trans. on Circuits and Systems, 57-I (4): 814-822 (2010)Performance, metastability and soft-error robustness tradeoffs for flip-flops in 40nm CMOS., , , , , , and . CICC, page 1-4. IEEE, (2011)RIIF - Reliability information interchange format., , , , and . IOLTS, page 103-108. IEEE Computer Society, (2012)Variation of SRAM Alpha-Induced Soft Error Rate with Technology Node., , , , , and . IOLTS, page 253-257. IEEE Computer Society, (2008)A Systematical Method of Quantifying SEU FIT., , and . IOLTS, page 109-114. IEEE Computer Society, (2008)Placement of repair circuits for in-field FPGA repair., , , , , and . FPGA, page 115-124. ACM, (2013)Design and Analysis of Low-Voltage Low-Parasitic ESD Protection for RF ICs in CMOS., , , , , , , , , and 1 other author(s). J. Solid-State Circuits, 46 (5): 1100-1110 (2011)Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms., , , , , , , and . FPL, page 282-285. IEEE Computer Society, (2011)Single Event Resilient Dynamic Logic Designs., , , , , , , , and . J. Electronic Testing, 30 (6): 751-761 (2014)Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree., , , , , , , , , and 3 other author(s). Microelectronics Reliability, (2018)