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QOS Aware HW/SW Partitioning on Run-time Reconfigurable Multimedia Platforms.

, , , , and . ERSA, page 84-92. CSREA Press, (2004)

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A SW/HW Interface API for Java/FPGA Co-Designed Applets., , , , , and . FCCM, page 269-270. IEEE Computer Society, (2001)Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications., , , , , , , and . SiPS, page 362-367. IEEE, (2006)Exploiting transport-block constraints in LTE improves downlink performance., , , , and . WCNC, page 1398-1402. IEEE, (2014)Hybrid lattice reduction algorithm and its implementation on an SDR baseband processor for LTE., , , , , and . EUSIPCO, page 91-95. IEEE, (2011)A Coarse-Grained Array Accelerator for Software-Defined Radio Baseband Processing., , , , and . IEEE Micro, 28 (4): 41-50 (2008)Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects., , , , , and . The Journal of Supercomputing, 21 (2): 131-144 (2002)Grape-II: A System-Level Prototyping Environment for DSP Applications., , , and . IEEE Computer, 28 (2): 35-43 (1995)An Integrated Software-Hardware Multiprocesor Project., and . ICPP, page 618-620. Pennsylvania State University Press, (1987)Fault-Tolerant Compact Routing Based on Reduced Structural Information in Wormhole-Switching Based Networks., , , and . SIROCCO, page 125-148. Carleton University Press, (1994)A User-triggered Checkpointing Library for Computationintensive Applications., , , and . Parallel and Distributed Computing and Systems, page 321-324. IASTED/ACTA Press, (1995)