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Embedded Scan Test with Diagnostic Features for Self-Testing SoCs.

, , , , , and . IOLTS, page 181-182. IEEE Computer Society, (2006)

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A Design Exploration Environment., , , , and . Great Lakes Symposium on VLSI, page 77-80. IEEE Computer Society, (1996)Local microcode generation in system design., , , and . Code Generation for Embedded Processors, page 171-187. Kluwer, (1994)A register-transfer-level fault simulator for permanent and transient faults in embedded processors., , , , and . DATE, page 811. IEEE Computer Society, (2001)Gate delay fault test generation for non-scan circuits., , , and . ED&TC, page 308-313. IEEE Computer Society, (1995)Generating reliable embedded processors., and . IEEE Micro, 18 (5): 33-41 (1998)Mixed level test generation for synchronous sequential circuits using the FOGBUSTER algorithm., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 15 (4): 410-423 (1996)Built-in Self Repair by Reconfiguration of FPGAs., , and . IOLTS, page 187-188. IEEE Computer Society, (2006)Combining on-line fault detection and logic self repair., , and . DDECS, page 288-293. IEEE, (2012)Efficient partitioning and analysis of digital CMOS-circuits., and . ICCAD, page 280-283. IEEE Computer Society / ACM, (1992)A comprehensive software-based self-test and self-repair method for statically scheduled superscalar processors., , , , , and . LATS, page 33-38. IEEE, (2016)