PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Castro-Lopez, Rafael"

Author of the publication

copydeleteadd this publication to your clipboard
Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths

, , , , , and . 2023 IEEE International Reliability Physics Symposium (IRPS), IEEE, (2023)
DOI: 10.1109/IRPS48203.2023.10117751

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Rafael Sendek University of Stuttgart

Rafael Horn University of Stuttgart

Rafael Jarosch

Dr. -Ing. Juan Santiago López Bermúdez University of Stuttgart

Rodrigo Lopez Portillo Alcocer University of Stuttgart

 

Other publications of authors with the same name

Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey., , , , , , and . Microelectronics Journal, 40 (1): 156-176 (2009)Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors., , , and . IEEE Congress on Evolutionary Computation, page 1-8. IEEE, (2010)Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology., , , , , , , , , and 2 other author(s). PATMOS, page 82-87. IEEE, (2018)Experimental Characterization of Time-Dependent Variability in Ring Oscillators., , , , , , and . SMACD, page 229-232. IEEE, (2019)Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop., , , , , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (6): 989-1002 (2019)A 0.13 µm CMOS adaptive sigma-delta modulator for triple-mode GSM/Bluetooth/UMTS applications., , , , and . Microelectronics Journal, 41 (5): 277-290 (2010)Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability., , , , , , , , , and . IRPS, page 6-1. IEEE, (2018)A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI., , , , , , , , , and . J. Solid-State Circuits, 54 (2): 476-488 (2019)CMOS Characterization and Compact Modelling for Circuit Reliability Simulation., , , , , , and . IOLTS, page 139-142. IEEE, (2018)A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design., , , and . IEEE Trans. VLSI Syst., 26 (11): 2386-2394 (2018)