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Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures.

A. Lambrechts, P. Raghavan, M. Jayapala, B. Mei, F. Catthoor, and D. Verkest. IEEE Trans. VLSI Syst., 17 (1): 151-155 (2009)

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Flexible hardware acceleration for multimedia oriented microprocessors.F. Vermeulen, L. Nachtergaele, F. Catthoor, D. Verkest, and H. Man. MICRO, page 171-177. ACM/IEEE Computer Society, (2000)8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes.V. Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, and W. Dehaene. ESSCIRC, page 531-534. IEEE, (2011)Systematic Exploration of Power-Aware Scenarios for IEEE 802.11ac WLAN Systems.N. Zompakis, I. Filippopoulos, P. Kjeldsberg, F. Catthoor, and D. Soudris. DSD, page 28-35. IEEE Computer Society, (2014)Platform Independent Data Transfer and Storage Exploration Illustrated on Parallel Cavity Detection Algorithm.K. Danckaert, F. Catthoor, and H. Man. PDPTA, page 1669-1675. CSREA Press, (1999)Causality Constraints for Processor Architectures with Sub-Word Parallelism.R. Schaffer, R. Merker, and F. Catthoor. DSD, page 82-89. IEEE Computer Society, (2003)An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating.I. Taniguchi, M. Uchida, H. Tomiyama, M. Fukui, P. Raghavan, and F. Catthoor. DSD, page 693-700. IEEE Computer Society, (2011)Memory-aware system scenario approach energy impact.I. Filippopoulos, F. Catthoor, P. Kjeldsberg, E. Hammari, and J. Huisken. NORCHIP, page 1-6. IEEE, (2012)Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor.A. Lambrechts, P. Raghavan, M. Jayapala, F. Catthoor, and D. Verkest. VLSI Design, page 201-207. IEEE Computer Society, (2008)Code Transformations for Reduced Data Transfer and Storage in Low Power Realisations of MPEG-4 Full-Pel Motion Estimation.E. Brockmeyer, F. Catthoor, J. Bormans, and H. Man. ICIP (3), page 985-989. (1998)Selective Spanning with Fast Enumeration: A Near Maximum-Likelihood MIMO Detector Designed for Parallel Programmable Baseband Architectures.M. Li, B. Bougard, E. Lopez-Estraviz, A. Bourdoux, D. Novo, L. der Perre, and F. Catthoor. ICC, page 737-741. IEEE, (2008)

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Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures.

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Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures.