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Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip.

, , , and . DSD, page 319-326. IEEE Computer Society, (2013)

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Synthesis and layout of an asynchronous network-on-chip using Standard EDA tools., , , and . NORCHIP, page 1-6. IEEE, (2014)TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research., , , , , , , , , and . WCET, volume 55 of OASIcs, page 2:1-2:10. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2016)Interfacing hardware accelerators to a time-division multiplexing network-on-chip., , , and . NORCAS, page 1-4. IEEE, (2015)An area-efficient TDM NoC supporting reconfiguration for mode changes., , and . NOCS, page 1-4. IEEE, (2016)A loosely synchronizing asynchronous router for TDM-scheduled NOCs., , , , , and . NOCS, page 151-158. IEEE, (2014)Models of Communication for Multicore Processors., , and . ISORC Workshops, page 9-16. IEEE Computer Society, (2015)A Metaheuristic Scheduler for Time Division Multiplexed Networks-on-Chip., , , and . ISORC, page 309-316. IEEE Computer Society, (2014)A light-weight statically scheduled network-on-chip., , and . NORCHIP, page 1-6. IEEE, (2012)Message Passing on a Time-predictable Multicore Processor., , , and . ISORC, page 51-59. IEEE Computer Society, (2015)State-based Communication on Time-predictable Multicore Processors., , and . RTNS, page 225-234. ACM, (2016)