Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism.

S. Bota, M. Rosales, J. Rosselló, J. Segura, and A. Keshavarzi. ITC, page 1276-1284. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Segura, Jaume

add a person with the name Segura, Jaume

Other publications of authors with the same name

Reliability Analysis of Small-Delay Defects Due to Via Narrowing in Signal Paths.H. Villacorta, C. Hawkins, V. Champac, J. Segura, and R. Gómez. IEEE Design & Test, 30 (6): 70-79 (2013)A Compact Charge-Based Propagation Delay Model for Submicronic CMOS Buffers.J. Rosselló, and J. Segura. PATMOS, volume 2451 of Lecture Notes in Computer Science, page 219-228. Springer, (2002)Automatic Detection and Characterization of Acoustic Plane-Wave Reflections Using Circular Microphone Arrays.M. Cobos, F. Ferri, A. Torres, and J. Segura. IbPRIA, volume 7887 of Lecture Notes in Computer Science, page 774-781. Springer, (2013)A novel wavelet transform based transient current analysis for fault detection and localization.S. Bhunia, K. Roy, and J. Segura. DAC, page 361-366. ACM, (2002)Smart Temperature Sensor for Thermal Testing of Cell-Based ICs.S. Bota, M. Rosales, J. Rosselló, and J. Segura. DATE, page 464-465. IEEE Computer Society, (2005)Analyzing the Need for ATPG Targeting GOS Defects.E. Isern, M. Roca, and J. Segura. VTS, page 420-425. IEEE Computer Society, (1999)Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments.I. de Paúl, M. Rosales, B. Alorda, J. Segura, C. Hawkins, and J. Soden. VTS, page 286-291. IEEE Computer Society, (2001)The anatomy of nanometer timing failures.C. Hawkins, and J. Segura. European Test Symposium, page 210-215. IEEE Computer Society, (2005)A BIST-based Charge Analysis for Embedded Memories.B. Alorda, V. Canals, I. de Paúl, and J. Segura. IOLTS, page 199-206. IEEE Computer Society, (2004)An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing.B. Alorda, and J. Segura. IOLTS, page 178-182. IEEE Computer Society, (2003)

PUMA

Disambiguation of "Segura, Jaume"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Segura, Jaume"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism.