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Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.

A. Bartic, D. Desmet, J. Mignolet, T. Marescaux, D. Verkest, S. Vernalde, R. Lauwereins, J. Miller, and F. Robert. FPL, volume 3203 of Lecture Notes in Computer Science, page 637-647. Springer, (2004)

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Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects.Y. Ha, S. Vernalde, P. Schaumont, M. Engels, R. Lauwereins, and H. Man. The Journal of Supercomputing, 21 (2): 131-144 (2002)A SW/HW Interface API for Java/FPGA Co-Designed Applets.Y. Ha, P. Schaumont, S. Vernalde, M. Engels, R. Lauwereins, and H. Man. FCCM, page 269-270. IEEE Computer Society, (2001)Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications.Y. Ha, R. Hipik, S. Vernalde, D. Verkest, M. Engels, R. Lauwereins, and H. Man. FPL, volume 2438 of Lecture Notes in Computer Science, page 1135-1138. Springer, (2002)Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays.S. Wilton, N. Kafafi, B. Mei, and S. Vernalde. FPT, page 33-40. IEEE, (2004)A Technique for Combined Virtual Prototyping and Hardware Design.P. Schaumont, G. Vanmeerbeeck, E. Watzeels, S. Vernalde, M. Engels, and I. Bolsens. International Workshop on Rapid System Prototyping, page 156-161. IEEE Computer Society, (1998)A Hardware Virtual Machine for the Networked Reconfiguration.Y. Ha, P. Schaumont, M. Engels, S. Vernalde, F. Potargent, L. Rijnders, and H. Man. IEEE International Workshop on Rapid System Prototyping, page 194-199. IEEE Computer Society, (2000)Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.B. Mei, S. Vernalde, D. Verkest, and R. Lauwereins. DATE, page 1224-1229. IEEE Computer Society, (2004)Virtual Java/FPGA interface for networked reconfiguration.Y. Ha, G. Vanmeerbeeck, P. Schaumont, S. Vernalde, M. Engels, R. Lauwereins, and H. Man. ASP-DAC, page 558-563. ACM, (2001)Run-time support for heterogeneous multitasking on reconfigurable SoCs.T. Marescaux, V. Nollet, J. Mignolet, A. Bartic, W. Moffat, P. Avasare, P. Coene, D. Verkest, S. Vernalde, and R. Lauwereins. Integration, 38 (1): 107-130 (2004)Low Power Digital Frequency Conversion Architectures.P. Schaumont, S. Vernalde, M. Engels, and I. Bolsens. VLSI Signal Processing, 18 (2): 187-197 (1998)

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Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.

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Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.