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Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance.

Y. Chen, H. Li, C. Koh, G. Sun, J. Li, Y. Xie, and K. Roy. IEEE Trans. VLSI Syst., 18 (11): 1621-1624 (2010)

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Dr. Kaicong Sun University of Stuttgart

Jun. -Prof. Sun Hea Hong University of Stuttgart

Other publications of authors with the same name

Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.C. Zhang, P. Li, G. Sun, Y. Guan, B. Xiao, and J. Cong. FPGA, page 161-170. ACM, (2015)Influence of Stacked 3D Memory/Cache Architectures on GPUs.A. Al-Maashri, G. Sun, X. Dong, Y. Xie, and N. Vijaykrishnan. 3D Integration for NoC-based SoC Architectures, Springer, (2011)Improving Memory Access Performance of In-Memory Key-Value Store Using Data Prefetching Techniques.P. Zhu, G. Sun, P. Wang, and M. Chen. APPT, volume 9231 of Lecture Notes in Computer Science, page 1-17. Springer, (2015)Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design.F. Wang, G. Luo, G. Sun, J. Zhang, P. Huang, and J. Kang. ASAP, page 157-164. IEEE, (2019)A Probabilistic Data Replacement Strategy for Flash-Based Hybrid Storage System.Y. Lv, X. Chen, G. Sun, and B. Cui. APWeb, volume 7808 of Lecture Notes in Computer Science, page 360-371. Springer, (2013)BAYHENN: Combining Bayesian Deep Learning and Homomorphic Encryption for Secure DNN Inference.P. Xie, B. Wu, and G. Sun. IJCAI, page 4831-4837. ijcai.org, (2019)Toss-up Wear Leveling: Protecting Phase-Change Memories from Inconsistent Write Patterns.X. Zhang, and G. Sun. DAC, page 3:1-3:6. ACM, (2017)Cost-driven 3D integration with interconnect layers.X. Wu, G. Sun, X. Dong, R. Das, Y. Xie, C. Das, and J. Li. DAC, page 150-155. ACM, (2010)An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes.H. Li, Y. Liu, Q. Zhao, Y. Gu, X. Sheng, G. Sun, C. Zhang, M. Chang, R. Luo, and H. Yang. DATE, page 7-12. ACM, (2015)3DHLS: Incorporating high-level synthesis in physical planning of three-dimensional (3D) ICs.Y. Chen, G. Sun, Q. Zou, and Y. Xie. DATE, page 1185-1190. IEEE, (2012)

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Disambiguation of "Sun, Guangyu"

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Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance.

Please choose a person to relate this publication to

Dr. Kaicong Sun University of Stuttgart

Jun. -Prof. Sun Hea Hong University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Sun, Guangyu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance.

Please choose a person to relate this publication to

Dr. Kaicong Sun University of Stuttgart

Jun. -Prof. Sun Hea Hong University of Stuttgart

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
DIN 1505
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Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance.