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CDSP: an application-specific digital signal processor for third generation wireless communications., , and . IEEE Trans. Consumer Electronics, 47 (3): 672-677 (2001)Vector quantization using tree-structured self-organizing feature maps., , and . IEEE Journal on Selected Areas in Communications, 12 (9): 1594-1599 (1994)Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine., , , , , and . IEEE Trans. Circuits Syst. Video Techn., 18 (1): 98-109 (2008)Error concealment of lost motion vectors with overlapped motion compensation., , and . IEEE Trans. Circuits Syst. Video Techn., 7 (3): 560-563 (1997)A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm., and . IEEE Trans. Circuits Syst. Video Techn., 8 (2): 124-127 (1998)Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000., , , and . IEEE Trans. Circuits Syst. Video Techn., 13 (3): 219-230 (2003)Predictive line search: an efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors., , , and . IEEE Trans. Circuits Syst. Video Techn., 13 (1): 111-117 (2003)An efficient architecture for two-dimensional discrete wavelet transform., and . IEEE Trans. Circuits Syst. Video Techn., 11 (4): 536-545 (2001)VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC., , , , and . Signal Processing Systems, 53 (3): 335-347 (2008)Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension., , , , and . Signal Processing Systems, 60 (3): 363-375 (2010)