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Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams.

, , , , , and . FCCM, page 241. IEEE Computer Society, (2012)

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A 3D FPGA Architecture to Realize Simple Die Stacking., , , , and . IPSJ Trans. System LSI Design Methodology, (2015)Comparison of Properties between Entropy and Chi-Square Based Anomaly Detection Method., , and . NBiS, page 221-228. IEEE Computer Society, (2011)Performance Estimation of TCP under SYN Flood Attacks., and . CISIS, page 92-99. IEEE Computer Society, (2007)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , and . Int. J. Reconfig. Comp., (2008)The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures., , , , and . ICS, page 351-360. ACM, (1989)Basic Knowledge to Understand FPGAs.. Principles and Structures of FPGAs, Springer, (2018)A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , and . FPGA, page 271. ACM, (2013)Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)KITE microprocessor and CAE for computer science., , and . Systems and Computers in Japan, 33 (8): 64-74 (2002)An Anomaly Detection System Based on Chi-Square Method with Dynamic BIN Algorithm., , , and . BWCCA, page 549-554. IEEE Computer Society, (2011)