Author of the publication

Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams.

, , , , , and . FCCM, page 241. IEEE Computer Society, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Iida, Masahiro
add a person with the name Iida, Masahiro
 

Other publications of authors with the same name

A 3D FPGA Architecture to Realize Simple Die Stacking., , , , and . IPSJ Trans. System LSI Design Methodology, (2015)An Easily Testable Routing Architecture and Efficient Test Technique., , , , and . FPL, page 291-294. IEEE Computer Society, (2011)A heuristic method of generating diameter 3 graphs for order/degree problem (invited paper)., and . NOCS, page 1-6. IEEE, (2016)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , and . Int. J. Reconfig. Comp., (2008)Design Methodology.. Principles and Structures of FPGAs, Springer, (2018)Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , and . VLSI-SoC, page 225-230. IEEE, (2012)A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , and . FPGA, page 271. ACM, (2013)Architecture exploration of 3D FPGA to minimize internal layer connection., , , , , and . VLSI-SoC, page 110-115. IEEE, (2015)Three-dimensional stacking FPGA architecture using face-to-face integration., , , , , and . VLSI-SoC, page 192-197. IEEE, (2013)Improving the Robustness of a Softcore Processor against SEUs by Using TMR and Partial Reconfiguration., , , , , and . FCCM, page 47-54. IEEE Computer Society, (2010)