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Strategy for power efficient combined task and data parallelism exploration illustrated on a QSDPCM video codec., , , and . Journal of Systems Architecture, 45 (10): 791-808 (1999)Optimized memory requirements for wavelet-based scalable multimedia codecs., , , , , , and . J. Embedded Computing, 1 (3): 363-380 (2005)Software metadata: Systematic characterization of the memory behaviour of dynamic applications., , , , , , , and . Journal of Systems and Software, 83 (6): 1051-1075 (2010)Guest Editors' Intoduction: The New World of Large Embedded Memories., and . IEEE Design & Test of Computers, 18 (3): 3-4 (2001)Algorithms and parallel VLSI architectures., and . Integration, 20 (1): 1-2 (1995)A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy., , , , , and . J. Solid-State Circuits, 46 (10): 2416-2430 (2011)Memory Size Reduction Through Storage Order Optimization for Embedded Parallel Multimedia Applications., , and . Parallel Computing, 23 (12): 1811-1837 (1997)Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications., , , , , , and . Signal Processing Systems, 53 (3): 301-321 (2008)Introduction., , and . VLSI Signal Processing, 5 (2-3): 113 (1993)Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors., , , , , and . Signal Processing Systems, 64 (1): 75-92 (2011)