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A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy.

V. Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, and W. Dehaene. J. Solid-State Circuits, 46 (10): 2416-2430 (2011)

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Stefan Schubert University of Stuttgart

Experimental and Numerical Data for: "Micro-PIV study on the influence of viscosity on the dynamics of droplet impact onto a thin film"J. Steigerwald, and S. Schubert. Dataset, (2024)Related to: Schubert, S., Steigerwald, J., Geppert, A.K. et al. Micro-PIV study on the influence of viscosity on the dynamics of droplet impact onto a thin film. Exp Fluids 65, 69 (2024). doi: 10.1007/s00348-024-03800-5.

Stefan Kunert University of Stuttgart

Stefan Schippling University of Stuttgart

Stefan Hecht University of Stuttgart

Stefan Köbel University of Stuttgart

Other publications of authors with the same name

A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.A. Vignon, S. Cosemans, W. Dehaene, P. Marchal, and M. Facchini. DATE, page 929-933. IEEE, (2009)Hardware-Based Aging Mitigation Scheme for Memory Address Decoder.D. Kraak, I. Agbo, M. Taouil, S. Hamdioui, P. Weckx, S. Cosemans, and F. Catthoor. ETS, page 1-6. IEEE, (2019)Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM.V. Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, and W. Dehaene. DATE, page 1042-1047. IEEE, (2012)STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance.R. Appeltans, S. Cosemans, P. Raghavan, D. Verkest, L. der Perre, and W. Dehaene. NVMSA, page 1-6. IEEE, (2015)A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, Ultra Low Leakage Power Memory Using Dynamic Cell Stability and a Dual Swing Data Link.B. Rooseleer, S. Cosemans, and W. Dehaene. J. Solid-State Circuits, 47 (7): 1784-1796 (2012)A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link.B. Rooseleer, S. Cosemans, and W. Dehaene. ESSCIRC, page 519-522. IEEE, (2011)8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes.V. Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, and W. Dehaene. ESSCIRC, page 531-534. IEEE, (2011)A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy.V. Sharma, S. Cosemans, M. Ashouei, J. Huisken, F. Catthoor, and W. Dehaene. J. Solid-State Circuits, 46 (10): 2416-2430 (2011)Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications.J. Doevenspeck, R. Degraeve, S. Cosemans, P. Roussel, B. Verhoef, R. Lauwereins, and W. Dehaene. ESSDERC, page 62-65. IEEE, (2018)A Low-Power Embedded SRAM for Wireless Applications.S. Cosemans, W. Dehaene, and F. Catthoor. J. Solid-State Circuits, 42 (7): 1607-1617 (2007)