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Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation.

, , , , , and . IEEE Trans. VLSI Syst., 24 (2): 479-492 (2016)

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Synthesis and layout of an asynchronous network-on-chip using Standard EDA tools., , , and . NORCHIP, page 1-6. IEEE, (2014)The Argo NOC: Combining TDM and GALS., and . ECCTD, page 1-4. IEEE, (2015)An area-efficient network interface for a TDM-based network-on-chip., , and . DATE, page 1044-1047. EDA Consortium San Jose, CA, USA / ACM DL, (2013)T-CREST: Time-predictable multi-core architecture for embedded systems., , , , , , , , , and 13 other author(s). Journal of Systems Architecture - Embedded Systems Design, 61 (9): 449-471 (2015)A loosely synchronizing asynchronous router for TDM-scheduled NOCs., , , , , and . NOCS, page 151-158. IEEE, (2014)A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems., , , and . NOCS, page 152-160. IEEE Computer Society, (2012)Argo: A Time-Elastic Time-Division-Multiplexed NOC Using Asynchronous Routers., and . ASYNC, page 45-52. IEEE Computer Society, (2014)Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation., , , , , and . IEEE Trans. VLSI Syst., 24 (2): 479-492 (2016)Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip., , , and . DSD, page 319-326. IEEE Computer Society, (2013)