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From application descriptions to hardware in seconds: a logic-based approach to bridging the gap., and . IEEE Trans. VLSI Syst., 12 (4): 420-436 (2004)New bit-level algorithm for general purpose median filtering., and . J. Electronic Imaging, 12 (2): 263-269 (2003)An Environment for Generating FPGA Architectures for Image Algebra-based Algorithms., , , , and . ICIP (3), page 990-994. (1998)Towards a general framework for FPGA based image processing using hardware skeletons., , and . Parallel Computing, 28 (7-8): 1141-1154 (2002)High level programming for real time FPGA based video processing., , , and . ICASSP, page 3227-3230. IEEE, (2000)Speaker recognition in noisy conditions with limited training data., , and . EUSIPCO, page 1294-1298. IEEE, (2011)GPU Implementation of MAP-MRF for Microscopy Imagery Segmentation., , , , and . ISBI, page 526-529. IEEE, (2009)A largest matching area approach to image denoising., , and . ICASSP, page 1194-1198. IEEE, (2016)An array processing language for transputer networks., , , , and . Parallel Computing, 8 (1-3): 141-148 (1988)Design and evaluation of a speech interface for remote database searching., , , , and . J. Inf. Sci., 17 (1): 21-36 (1991)