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Disambiguation of "Benkrid, Abdsamad"

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High level programming for real time FPGA based video processing.

, , , and . ICASSP, page 3227-3230. IEEE, (2000)

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Other publications of authors with the same name

A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment., , and . IEEE Trans. VLSI Syst., 17 (4): 561-570 (2009)A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures., and . Digital Signal Processing, 23 (1): 453-469 (2013)A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs., , and . FCCM, page 273-275. IEEE Computer Society, (2003)Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA., , and . FCCM, page 190-198. IEEE Computer Society, (2001)Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA., , and . FCCM, page 162-172. IEEE Computer Society, (2003)Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT., , and . ISSPA (2), page 283-286. IEEE, (2003)0-7803-7946-2.Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs., , and . FPT, page 356-359. IEEE, (2002)Efficient FPGA hardware development: A multi-language approach., , and . Journal of Systems Architecture, 53 (4): 184-209 (2007)An FPGA-Based Image Connected Component Labeller., , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 1012-1015. Springer, (2003)Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension., and . IEEE Trans. VLSI Syst., 17 (5): 709-722 (2009)