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On-Line Testing of Lab-on-Chip Using Reconfigurable Digital-Microfluidic Compactors.

, and . International Journal of Parallel Programming, 37 (4): 370-388 (2009)

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Test Infrastructure Design - for Digital, Mixed-Signal and Hierarchical SOCs., and . LAP Lambert Academic Publishing, (2011)Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip., , , and . VLSI Design, page 171-176. IEEE Computer Society, (2011)Modular Testing and Built-In Self-Test of Embedded Cores in System-on-Chip Integrated Circuits.. Embedded Systems Handbook, CRC Press, (2005)Reconfiguration-Based Defect Tolerance for Microfluidic Biochips.. DFT, IEEE Computer Society, (2006)On-Chip Dilution from Multiple Concentrations of a Sample Fluid Using Digital Microfluidics., , , and . VDAT, volume 382 of Communications in Computer and Information Science, page 274-283. Springer, (2013)Test generation for clock-domain crossing faults in integrated circuits., , , and . DATE, page 406-411. IEEE, (2012)Waste-aware dilution and mixing of biochemical samples with digital microfluidic biochips., , and . DATE, page 1059-1064. IEEE, (2011)Efficient Wrapper/TAM Co-Optimization for Large SOCs., , and . DATE, page 491-498. IEEE Computer Society, (2002)High-quality pattern selection for screening small-delay defects considering process variations and crosstalk., , , and . DATE, page 1426-1431. IEEE, (2010)Defect aware X-filling for low-power scan testing., , , and . DATE, page 873-878. IEEE, (2010)