PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Drechsler, Rolf"

Author of the publication

copydeleteadd this publication to your clipboard
Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips

, , , , , and . 2023 IEEE European Test Symposium (ETS), IEEE, (2023)
DOI: 10.1109/ETS56758.2023.10174127

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

PD Dr. Rolf Brack University of Stuttgart

Rolf Beißwanger University of Stuttgart

PD Dr. Michael Rolf Schweikert University of Stuttgart

Dr. -Ing. Rolf Stierle University of Stuttgart

Dr. Rolf Bauer University of Stuttgart

 

Other publications of authors with the same name

Heuristic Learning Based on Genetic Programming., , , and . Genetic Programming and Evolvable Machines, 3 (4): 363-388 (2002)RevKit: A Toolkit for Reversible Circuit Design., , , and . Multiple-Valued Logic and Soft Computing, 18 (1): 55-65 (2012)Exact Synthesis of Elementary Quantum Gate Circuits., , , and . Multiple-Valued Logic and Soft Computing, 15 (4): 283-300 (2009)Panel: Future SoC verification methodology: UVM evolution or revolution?, , , , , , and . DATE, page 1-5. European Design and Automation Association, (2014)Automatic design of low-power encoders using reversible circuit synthesis., , , and . DATE, page 1036-1041. IEEE, (2012)Efficient minimization of fully testable 2-SPP networks., , , and . DATE, page 1300-1305. European Design and Automation Association, Leuven, Belgium, (2006)On the representational power of bit-level and word-level decision diagrams., , and . ASP-DAC, page 461-467. IEEE, (1997)Fast OFDD based minimization of fixed polarity Reed-Muller expressions., , and . EURO-DAC, page 2-7. IEEE Computer Society, (1994)SyReC: A Programming Language for Synthesis of Reversible Circuits., , and . MBMV, page 21-30. Fraunhofer Verlag, (2010)A Tight Lower Bound for Dynamic BDD Reordering., and . MBMV, page 233-242. Shaker, (2004)