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Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques., , , and . ESSDERC, page 221-225. IEEE, (2012)Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI., , , , , and . IRPS, page 3. IEEE, (2015)CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies., , , , , , , , , and . IRPS, page 1-7. IEEE, (2019)Impact of fin shape variability on device performance towards 10nm node., , , , , , , , , and 3 other author(s). ICICDT, page 1-4. IEEE, (2015)Towards high performance sub-10nm finW bulk FinFET technology., , , , , , , , , and 10 other author(s). ESSDERC, page 131-134. IEEE, (2016)STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process., , , , , , , , and . ESSDERC, page 159-162. IEEE, (2013)Origins and implications of increased channel hot carrier variability in nFinFETs., , , , , , , , , and 11 other author(s). IRPS, page 3. IEEE, (2015)