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Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study.

, , , , , and . ASAP, page 1-9. IEEE Computer Society, (2018)

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Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays., , and . J. Low Power Electronics, 7 (1): 29-40 (2011)Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models., , and . FDL, page 1-6. IEEE, (2008)A feasibility-preserving local search operator for constrained discrete optimization problems., , , and . IEEE Congress on Evolutionary Computation, page 1968-1975. IEEE, (2008)Parametric yield optimization using leakage-yield-driven floorplanning., , and . PATMOS, page 1-6. IEEE, (2014)A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template., , , and . ReCoSoC, page 31-37. Univ. Montpellier II, (2006)Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators., , and . FCCM, page 279-282. IEEE Computer Society, (2009)An Architecture Description Language for Massively Parallel Processor Architectures., , , , , and . MBMV, page 11-20. Fraunhofer Institut für Integrierte Schaltungen, (2006)Model-Based Representation of Schedules for Dataflow Graphs., , , and . MBMV, page 105-115. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)Improved Time Domain Simulation of Optical Multimode Intrasystem Interconnects., , , , and . DATE, page 11110-11111. IEEE Computer Society, (2003)Symbolic inner loop parallelisation for massively parallel processor arrays., , , and . MEMOCODE, page 219-228. IEEE, (2014)