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Disambiguation of "Chan, Yuen H."

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Design SRAMs for burn-in.

, , , , and . VTS, page 164-170. IEEE Computer Society, (1993)

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H. Binz

H. Bungartz

Dr. phil. Geoffrey Chanda University of Stuttgart

H. Binz

H. Binz

 

Other publications of authors with the same name

4.1 22nm Next-generation IBM System z microprocessor., , , , , , , , , and 21 other author(s). ISSCC, page 1-3. IEEE, (2015)Design SRAMs for burn-in., , , , and . VTS, page 164-170. IEEE Computer Society, (1993)Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module., , , , , , , , , and 15 other author(s). J. Solid-State Circuits, 49 (1): 9-18 (2014)The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane., , , , and . IEEE Design & Test of Computers, 27 (6): 36-45 (2010)IBM POWER6 SRAM arrays., and . IBM Journal of Research and Development, 51 (6): 747-756 (2007)5.5GHz system z microprocessor and multi-chip module., , , , , , , , , and 13 other author(s). ISSCC, page 46-47. IEEE, (2013)Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor., , , , , and . ISSCC, page 72-73. IEEE, (2011)A 5.2GHz microprocessor chip for the IBM zEnterprise™ system., , , , , , , , , and 17 other author(s). ISSCC, page 70-72. IEEE, (2011)Design of Sub-90 nm Low-Power and Variation Tolerant PD/SOI SRAM Cell Based on Dynamic Stability Metrics., , , , , and . J. Solid-State Circuits, 44 (3): 965-976 (2009)7GHz L1 cache SRAMs for the 32nm zEnterprise™ EC12 processor., , , , , , , , and . ISSCC, page 324-325. IEEE, (2013)