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Automatic generation of assertions from system level design using data mining.

, , , and . MEMOCODE, page 191-200. IEEE, (2011)

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A Coverage Guided Mining Approach for Automatic Generation of Succinct Assertions., , , and . VLSI Design, page 68-73. IEEE Computer Society, (2014)Efficient validation input generation in RTL by hybridized source code analysis., and . DATE, page 1596-1601. IEEE, (2011)Automatic generation of assertions from system level design using data mining., , , and . MEMOCODE, page 191-200. IEEE, (2011)Diagnosing root causes of system level performance violations., , , and . ICCAD, page 295-302. IEEE, (2013)Automatic Generation of System Level Assertions from Transaction Level Models., and . J. Electronic Testing, 29 (5): 669-684 (2013)A Technique for Test Coverage Closure Using GoldMine., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (5): 790-803 (2012)A machine-to-machine based framework for diabetes lifestyle management., , , , and . ICNSC, page 562-567. IEEE, (2013)A Theoretical Model to Efficiently Transport YouBike., and . GreenCom/iThings/CPScom, page 716-719. IEEE, (2013)Word level feature discovery to enhance quality of assertion mining., , and . ICCAD, page 210-217. ACM, (2012)STAR: Generating input vectors for design validation by static analysis of RTL., and . HLDVT, page 32-37. IEEE Computer Society, (2009)