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Disambiguation of "Sheridan, David"

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A Technique for Test Coverage Closure Using GoldMine.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (5): 790-803 (2012)

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Dr. Marie Davidova University of Stuttgart

David Inkermann

David Briesenick University of Stuttgart

David Gudnason University of Stuttgart

David Stieler University of Stuttgart

 

Other publications of authors with the same name

Towards coverage closure: Using GoldMine assertions for generating design validation stimulus., , , and . DATE, page 173-178. IEEE, (2011)A Coverage Guided Mining Approach for Automatic Generation of Succinct Assertions., , , and . VLSI Design, page 68-73. IEEE Computer Society, (2014)GoldMine: Automatic assertion generation using data mining and static analysis., , , , , and . DATE, page 626-629. IEEE, (2010)Signature Pattern Covering via Local Greedy Algorithm and Pattern Shrink., , , , , and . ICDM, page 330-339. IEEE Computer Society, (2011)Mining Hardware Assertions With Guidance From Static Analysis., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (6): 952-965 (2013)A Technique for Test Coverage Closure Using GoldMine., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (5): 790-803 (2012)Automatic generation of assertions from system level design using data mining., , , and . MEMOCODE, page 191-200. IEEE, (2011)Design automation methodology and rf/analog modeling for rf CMOS and SiGe BiCMOS technologies., , , , , , , , , and 8 other author(s). IBM Journal of Research and Development, 47 (2-3): 139-176 (2003)A Physics-Based Model for a SiC JFET Device Accounting for the Mobility Dependence on Temperature and Electric Field., , , , , , , , , and . IAS, page 1-8. IEEE, (2008)