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Disambiguation of "Magnone, Paolo"

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Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements.

, , , , , , and . IEEE Trans. on Circuits and Systems, 59-II (7): 439-442 (2012)

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PD Dr. Paolo Malgaretti University of Stuttgart

Paolo Carlo Danesini University of Stuttgart

 

Other publications of authors with the same name

Full Model and Characterization of Noise in Operational Amplifier., , , and . IEEE Trans. on Circuits and Systems, 56-I (1): 97-102 (2009)Interfacial layer quality effects on low-frequency noise (1/f) in p-MOSFETs with advanced gate stacks., , , , , , and . Microelectronics Reliability, 47 (4-5): 501-504 (2007)Understanding the Potential and the Limits of Germanium pMOSFETs for VLSI Circuits From Experimental Measurements., , , , and . IEEE Trans. VLSI Syst., 19 (9): 1569-1582 (2011)A methodology to account for the finger interruptions in solar cell performance., , , , , , , and . Microelectronics Reliability, 52 (9-10): 2500-2503 (2012)Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling., , , , , , , , and . IEEE Trans. VLSI Syst., 20 (8): 1487-1495 (2012)Low frequency noise in nMOSFETs with subnanometer EOT hafnium-based gate dielectrics., , , and . Microelectronics Reliability, 47 (12): 2109-2113 (2007)Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements., , , , , , and . IEEE Trans. on Circuits and Systems, 59-II (7): 439-442 (2012)Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling., , , , , , , , and . ISCAS, page 2249-2252. IEEE, (2011)Investigation of the hot carrier degradation in power LDMOS transistors with customized thick oxide., , , , , , , and . Microelectronics Reliability, (2017)Plug and Play DC-DC Converters for Smart DC Nanogrids with Advanced Control Ancillary Services., , , , and . CAMAD, page 1-6. IEEE, (2018)