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Disambiguation of "Suzuki, Toshikazu"

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A 6T SRAM with a carrier-injection scheme to pinpoint and repair fails that achieves 57% faster read and 31% lower read energy.

, , , and . ISSCC, page 232-234. IEEE, (2012)

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Other publications of authors with the same name

0.3-1.5 V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical Memory Cell and Source-Level-Adjusted Direct-Sense-Amplifier., , , , , and . IEICE Transactions, 88-C (4): 630-638 (2005)A 6T-SRAM With a Post-Process Electron Injection Scheme That Pinpoints and Simultaneously Repairs Disturb Fails for 57% Less Read Delay and 31% Less Read Energy., , , and . J. Solid-State Circuits, 48 (9): 2239-2249 (2013)60% Cycle time acceleration, 55% energy reduction, 32Kbit SRAM by auto-selective boost (ASB) scheme for slow memory cells in random variations., , , , , and . ESSCIRC, page 317-320. IEEE, (2012)A Stable SRAM Mitigating Cell-Margin Asymmetricity with A Disturb-Free Biasing Scheme., , , and . CICC, page 233-236. IEEE, (2007)A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM using low-power disturb mitigation technique., , , , , , and . ASP-DAC, page 77-78. IEEE, (2013)Simulating Marbling with Computer Graphics., , and . VIIP, page 208-213. ACTA Press, (2001)A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction., , , , , , and . ISQED, page 489-492. IEEE, (2012)A Stable 2-Port SRAM Cell Design Against Simultaneously Read/Write-Disturbed Accesses., , , , and . J. Solid-State Circuits, 43 (9): 2109-2119 (2008)AtelierM: a physically based interactive system for creating traditional marbling textures., , and . GRAPHITE, page 79-86. ACM, (2003)A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique., , , , , , and . IEICE Electronic Express, 9 (12): 1023-1029 (2012)