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A Flexible Design Flow for Software IP Binding in FPGA.

, , and . IEEE Trans. Industrial Informatics, 6 (4): 719-728 (2010)

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A flexible design flow for software IP binding in commodity FPGA., , and . SIES, page 211-218. IEEE, (2009)A Simulator for Flexible Sensor Nodes in Wireless Networks., , , and . MSN, page 373-375. IEEE Computer Society, (2011)A software-hardware emulator for sensor networks., , , , , and . SECON, page 440-448. IEEE, (2011)Simulating power/energy consumption of sensor nodes with flexible hardware in wireless networks., , , and . SECON, page 112-120. IEEE, (2012)A Technique for Combined Virtual Prototyping and Hardware Design., , , , , and . International Workshop on Rapid System Prototyping, page 156-161. IEEE Computer Society, (1998)A Hardware Virtual Machine for the Networked Reconfiguration., , , , , , and . IEEE International Workshop on Rapid System Prototyping, page 194-199. IEEE Computer Society, (2000)A design method for remote integrity checking of complex PCBs., , , , , and . DATE, page 1517-1522. IEEE, (2016)Synthesis of pipelined DSP accelerators with dynamic scheduling., , , and . IEEE Trans. VLSI Syst., 5 (1): 59-68 (1997)Foundations of Secure Scaling (Dagstuhl Seminar 16342)., , , and . Dagstuhl Reports, 6 (8): 65-90 (2016)The Impact of Aging on a Physical Unclonable Function., and . IEEE Trans. VLSI Syst., 22 (9): 1854-1864 (2014)