Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Changing Interaction of Compiler and Architecture., , , , , , , , , and 1 other author(s). IEEE Computer, 30 (12): 51-58 (1997)ReveNAND: A Fast-Drift-Aware Resilient 3D NAND Flash Design., , , and . TACO, 15 (2): 17:1-17:26 (2018)A Constraint Network Based Approach to Memory Layout Optimization, , and . CoRR, (2007)Thermal-Aware Task Allocation and Scheduling for Embedded Systems, , , , and . CoRR, (2007)A Matrix-Based Approach to Global Locality Optimization., , , and . J. Parallel Distrib. Comput., 58 (2): 190-235 (1999)Optimising power efficiency in trace cache fetch unit., , , and . IET Computers & Digital Techniques, 1 (4): 334-348 (2007)Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors., and . MICRO, page 313-324. IEEE Computer Society, (2010)Energy-Aware Code Replication for Improving Reliability in Embedded Chip Multiprocessors., , , and . SoCC, page 77-78. IEEE, (2006)Organizing the Last Line of Defense before Hitting the Memory Wall for CMP., , and . HPCA, page 176-185. IEEE Computer Society, (2004)Design and Evaluation of Smart Disk Architecture for DSS Commercial Workloads., , and . ICPP, page 335-344. IEEE Computer Society, (2000)