%0 Journal Article %1 journals/jssc/GangasaniHBBKXFPGRCHBGFEHSM14 %A Gangasani, Gautam R. %A Hsu, Chun-Ming %A Bulzacchelli, John F. %A Beukema, Troy J. %A Kelly, William %A Xu, Hui H. %A Freitas, David %A Prati, Andrea %A Gardellini, Daniele %A Reutemann, Robert %A Cervelli, Giovanni %A Hertle, Juergen %A Baecher, Matthew %A Garlett, Jon %A Francese, Pier Andrea %A Ewen, John F. %A Hanson, David %A Storaska, Daniel W. %A Meghelli, Mounir %D 2014 %J J. Solid-State Circuits %K dblp %N 11 %P 2474-2489 %T A 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology. %U http://dblp.uni-trier.de/db/journals/jssc/jssc49.html#GangasaniHBBKXFPGRCHBGFEHSM14 %V 49

@article{journals/jssc/GangasaniHBBKXFPGRCHBGFEHSM14, added-at = {2018-09-29T00:00:00.000+0200}, author = {Gangasani, Gautam R. and Hsu, Chun-Ming and Bulzacchelli, John F. and Beukema, Troy J. and Kelly, William and Xu, Hui H. and Freitas, David and Prati, Andrea and Gardellini, Daniele and Reutemann, Robert and Cervelli, Giovanni and Hertle, Juergen and Baecher, Matthew and Garlett, Jon and Francese, Pier Andrea and Ewen, John F. and Hanson, David and Storaska, Daniel W. and Meghelli, Mounir}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/208c56ca973b75e028323f6423fbe8573/dblp}, ee = {https://doi.org/10.1109/JSSC.2014.2340574}, interhash = {ea676b826de9db44a62928aababb66ac}, intrahash = {08c56ca973b75e028323f6423fbe8573}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 11, pages = {2474-2489}, timestamp = {2019-09-27T06:09:17.000+0200}, title = {A 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc49.html#GangasaniHBBKXFPGRCHBGFEHSM14}, volume = 49, year = 2014 }