@jens.anders

A 107 dB SFDR, 80 kS/s Nyquist-rate SAR ADC using a hybrid capacitive and incremental Sigma Delta DAC

, , , und . 2017 Symposium on Vlsi Circuits, (2017)

Links und Ressourcen

Tags

Community

  • @jens.anders
  • @iis
@jens.anderss Tags hervorgehoben