This paper presents a design environment for continuous-time sigma-delta analog-to-digital converters for automatic coefficient scaling using a genetic algorithm. In order to provide an interactive design tool which enables the designer to transform and refine basic performance specifications into the desired, detailed high-level filter description, a short response time is mandatory. Previously published heuristic-search-based design tools have response times in the range of several ten minutes up to hours and are mostly not freely available. In contrast, the design environment presented in this paper provides results in less than a minute due the utilization of a fast simulation method implemented on a graphics card processor. Our hardware supported approach allows performing between 10 k and 67 k simulations and evaluations per second for internal model orders of one to eight, allowing to investigate millions of settings in less than a minute.
%0 Journal Article
%1 6695797
%A Brückner, T.
%A Zorn, C.
%A Anders, J.
%A Becker, J.
%A Mathis, W.
%A Ortmanns, M.
%D 2014
%J IEEE Transactions on Circuits and Systems I: Regular Papers
%K delta modulators sigma
%N 5
%P 1429-1441
%R 10.1109/TCSI.2013.2289408
%T A GPU-Accelerated Web-Based Synthesis Tool for CT Sigma-Delta Modulators
%U https://ieeexplore.ieee.org/document/6695797/
%V 61
%X This paper presents a design environment for continuous-time sigma-delta analog-to-digital converters for automatic coefficient scaling using a genetic algorithm. In order to provide an interactive design tool which enables the designer to transform and refine basic performance specifications into the desired, detailed high-level filter description, a short response time is mandatory. Previously published heuristic-search-based design tools have response times in the range of several ten minutes up to hours and are mostly not freely available. In contrast, the design environment presented in this paper provides results in less than a minute due the utilization of a fast simulation method implemented on a graphics card processor. Our hardware supported approach allows performing between 10 k and 67 k simulations and evaluations per second for internal model orders of one to eight, allowing to investigate millions of settings in less than a minute.
@article{6695797,
abstract = {This paper presents a design environment for continuous-time sigma-delta analog-to-digital converters for automatic coefficient scaling using a genetic algorithm. In order to provide an interactive design tool which enables the designer to transform and refine basic performance specifications into the desired, detailed high-level filter description, a short response time is mandatory. Previously published heuristic-search-based design tools have response times in the range of several ten minutes up to hours and are mostly not freely available. In contrast, the design environment presented in this paper provides results in less than a minute due the utilization of a fast simulation method implemented on a graphics card processor. Our hardware supported approach allows performing between 10 k and 67 k simulations and evaluations per second for internal model orders of one to eight, allowing to investigate millions of settings in less than a minute.},
added-at = {2020-10-11T10:14:44.000+0200},
author = {{Brückner}, T. and {Zorn}, C. and {Anders}, J. and {Becker}, J. and {Mathis}, W. and {Ortmanns}, M.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2088748bb3f3c0c10c7f47ec535736dc2/jens.anders},
doi = {10.1109/TCSI.2013.2289408},
interhash = {ce1696834172f6bb7f5b1f14e43b741a},
intrahash = {088748bb3f3c0c10c7f47ec535736dc2},
issn = {1558-0806},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
keywords = {delta modulators sigma},
month = may,
number = 5,
pages = {1429-1441},
timestamp = {2020-10-12T13:46:43.000+0200},
title = {A GPU-Accelerated Web-Based Synthesis Tool for CT Sigma-Delta Modulators},
url = {https://ieeexplore.ieee.org/document/6695797/},
volume = 61,
year = 2014
}
