%0 Conference Paper %1 conf/esscirc/DuarteKMHKADC15 %A Duarte, Juan Pablo %A Khandelwal, Sourabh %A Medury, Aditya %A Hu, Chenming %A Kushwaha, Pragya %A Agarwal, Harshit %A Dasgupta, Avirup %A Chauhan, Yogesh Singh %B ESSCIRC %D 2015 %E Pribyl, Wolfgang %E Dielacher, Franz %E Hueber, Gernot %I IEEE %K dblp %P 196-201 %T BSIM-CMG: Standard FinFET compact model for advanced circuit design. %U http://dblp.uni-trier.de/db/conf/esscirc/esscirc2015.html#DuarteKMHKADC15 %@ 978-1-4673-7472-9

@inproceedings{conf/esscirc/DuarteKMHKADC15, added-at = {2018-11-02T00:00:00.000+0100}, author = {Duarte, Juan Pablo and Khandelwal, Sourabh and Medury, Aditya and Hu, Chenming and Kushwaha, Pragya and Agarwal, Harshit and Dasgupta, Avirup and Chauhan, Yogesh Singh}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2c94664315c97367ffd522c10b111a917/dblp}, booktitle = {ESSCIRC}, crossref = {conf/esscirc/2015}, editor = {Pribyl, Wolfgang and Dielacher, Franz and Hueber, Gernot}, ee = {https://doi.org/10.1109/ESSCIRC.2015.7313862}, interhash = {a97bae6328535b95d2c12bad0dbe056b}, intrahash = {c94664315c97367ffd522c10b111a917}, isbn = {978-1-4673-7472-9}, keywords = {dblp}, pages = {196-201}, publisher = {IEEE}, timestamp = {2019-09-27T21:51:16.000+0200}, title = {BSIM-CMG: Standard FinFET compact model for advanced circuit design.}, url = {http://dblp.uni-trier.de/db/conf/esscirc/esscirc2015.html#DuarteKMHKADC15}, year = 2015 }